RP2040 (Tier 1)

The RP2040 is Flint’s primary target. It is the chip on the Raspberry Pi Pico.

Chip Summary

Property	Value
Chip	RP2040
CPU	Dual-core ARM Cortex-M0+
Architecture	ARMv6-M / Thumb baseline
Flash	2 MB (Pico), via external SPI flash
RAM	264 KB SRAM
Output formats	ELF, BIN, UF2
Board	`board/pico`

Getting Started

# flint.toml
name = "my_project"
version = "0.1.0"
edition = "2026"
target = "rp2040"
board = "pico"

flint build --output-format uf2

Copy build/my_project.uf2 to the Pico in BOOTSEL mode.

Supported Peripherals

All of the following are available on rp2040:

Package	Peripheral
`micro/gpio`	Digital I/O: 30 GPIO pins
`micro/uart`	UART0, UART1
`micro/i2c`	I2C0, I2C1
`micro/spi`	SPI0, SPI1
`micro/adc`	4 external ADC channels (GPIO26-29), 1 internal (temp sensor)
`micro/pwm`	8 PWM slices, 16 channels
`micro/dma`	12 DMA channels
`micro/pio`	2 PIO blocks, 4 state machines each
`micro/multicore`	Dual-core launch and inter-core communication
`micro/cpu`	WFI, WFE, breakpoint, spin-loop hint

The `board/pico` Package

The Pico board package provides:

Named pins: pico.pin.led (GPIO 25), pico.pin.gpio0 … pico.pin.gpio28
Default console: pico.default_console(), configured as UART0 on GPIO 0/1
Temperature sensor: pico.temp_sensor(), wrapping ADC channel 4
Capability descriptor: pico.capabilities()

use board/pico
use micro/gpio

let mut led = gpio.pin(pico.pin.led).into_output()
let sensor = pico.temp_sensor()
let mut console = pico.default_console().baud(115_200).init()

Memory Layout

Flash: 0x10000000  (2 MB, XIP)
RAM:   0x20000000  (264 KB)
  Heap: configured by target profile
  Stack: grows down from top of RAM

Image Format

Flint produces a valid UF2 for the RP2040 with the correct family ID. The UF2 includes the boot2 second-stage bootloader, vector table, and program image.

flint build --output-format uf2     # drag-and-drop flashing
flint build --output-format elf     # for probe-rs / OpenOCD
flint build --output-format bin     # raw binary

Flashing

UF2 drag-and-drop (simplest):

# Hold BOOTSEL while connecting USB, then:
cp build/project.uf2 /Volumes/RPI-RP2/

probe-rs:

probe-rs run --chip RP2040 build/project.elf

picotool:

picotool load build/project.uf2 --force

Dual-Core

RP2040 has two Cortex-M0+ cores. Use micro/multicore to launch code on core 1:

use micro/multicore

fn core1_task() -> never {
    loop {
        handle_peripheral_work()
    }
}

fn main() -> never {
    multicore.launch(1, core1_task)?
    loop {
        handle_main_work()
    }
}

Communicate between cores using channels from std/sync.

PIO

RP2040 has 8 PIO state machines (2 blocks of 4). See the PIO chapter for full details.

Recursive calls are a compile error by default on MCU targets. The Cortex-M0+ has limited stack and no hardware stack overflow detection. Opt in explicitly when you know your recursive depth is bounded:

allow-recursion = true

The Flint Book