RP2350 (Tier 1)
The RP2350 is the successor to the RP2040, featured on the Raspberry Pi Pico 2. It is a planned Tier 1 target.
Chip Summary
| Property | Value |
|---|---|
| Chip | RP2350 |
| CPU | Dual Cortex-M33 (or dual RISC-V, user-selectable at boot) |
| Architecture | ARMv8-M Mainline / Thumb-2 |
| Flash | 4 MB (Pico 2), via external SPI flash |
| RAM | 520 KB SRAM |
| Output formats | ELF, BIN, UF2 |
| Board | board/pico2 |
Getting Started
# flint.toml
name = "my_project"
version = "0.1.0"
edition = "2026"
target = "rp2350"
board = "pico2"
Differences from RP2040
The RP2350 Cortex-M33 backend uses ARMv8-M Mainline / Thumb-2 instruction encoding. Key differences in Flint’s code generation:
- Thumb-2 instructions provide 32-bit extensions, improving code density and available operations.
- The M33 has hardware floating-point (FPU), enabling more efficient
f32operations. - More RAM and flash allow larger programs and bigger buffers.
The micro/* API surface is the same as RP2040. Code written for rp2040 should compile for rp2350 without source changes in most cases.
RISC-V Mode
The RP2350 can also run in RISC-V mode (rp2350-riscv). This is a separate planned target. The Cortex-M33 ARM mode is the primary RP2350 target.
board/pico2 Package
The Pico 2 board package mirrors board/pico with Pico 2 pin names, increased flash/RAM, and any Pico 2-specific board conveniences.
Status
RP2350 backend support is reserved and planned. The ARMv6-M RP2040 backend is the current primary implementation. RP2350 will follow once RP2040 is fully hardened.
Check the repository for current RP2350 status.